VYUsync’s HEVC 4Kp60, 4:2:2, 10-bit Decoder Core is a highly optimized universal video decompression engine. The Decoder has been tested with more than 3000 industry standard test streams and is ...

Encoder and decoder IP support the LDPC coding schemes as defined by the CCSDS 231.0-B-3 or the 142.0-B-1 versions of the standard. The IP Cores are available for ASIC and FPGA (Xilinx and Intel) ...