The ADC includes built in calibration to remove time interleaving artifacts, including offset mismatch, gain mismatch and timing skew. It also includes internal analog test probes to enable ...

see the entire 1~50V/V low offset PGA for SAR-ADC ; UMC 0.18um Mixed-Mode PROCESS datasheet get in contact with 1~50V/V low offset PGA for SAR-ADC ; UMC 0.18um Mixed ...