GIDL is primarily caused by band-to-band tunneling (BTBT) at the drain junction under high electric field conditions. This ...

The Tri-Gate design is considered 3D because the gate wraps around a raised source-to-drain channel, called a "fin," instead of residing on top of the channel in the traditional 2D planar design.

As elements in the chip were being reduced to 45 nanometers, the gate dielectric began to lose its insulating (dielectric) quality and exhibited too much leakage. The gate dielectric is a very ...