Enter T1 (short for Torrent-1), a RISC-V vector inspired by the Cray X1 vector machine. T1 has support for features, including lanes and chaining. The chip contains a version of the Rocket Core ...

For developers on Xilinx FPGAs they have extended the offer of those two processor cores at zero cost through their DesignStart Programme. It’s free-as-in-beer rather than something that will ...

The SiFive Intelligence VIU75 Standard Core is a single-core instantiation of our RISC-V application processor with vector extensions and is capable of supporting full-featured operating systems such ...