The eSi-SPI core is a Serial Peripheral Interface that can be used to implement full-duplex, synchronous, serial communications between ICs. The eSi-SPI core can operate as a SPI master or slave.

The CC-SPI-APB is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller. The SPI core can be efficiently implemented on FPGA and ASIC technologies.

And, of course, these peripherals are present on the Compute Module 4, too ... As for UARTs, the Raspberry Pi’s one-and-a-half UART interface has long been an issue in robotics and home ...