January 3, 2017 -- Genesys Logic, Inc., a leading IC design company in mixed-signal, high-speed I/O technologies, today announced its high-performance USB 3.1 Gen 2 USB-C™ integrated SuperSpeed Plus ...
This USB 3.1 Gen2 PHY IP implements USB3.1 Gen2 transceiver and can be used as host and device. PHY IP supports USB3.1 Gen2 high speed data rate up to 10Gbps with integrated mixed signal circuit, also ...
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